Threshold voltage (Vt) increase in metal oxide semiconductor field effect transistors (MOSFETs) due to Bias Temperature Instability (BTI) is a significant reliability concern in high-K (high dielectric constant) metal gate complementary metal oxide semiconductor (CMOS) technologies. P-type metal oxide semiconductor devices (PMOS) are affected by Negative BTI (NBTI) and n-type metal oxide semiconductor devices (NMOS) are affected by Positive BTI (PBTI). NBTI leads to PMOS Vt degradation and PBTI leads to NMOS Vt degradation.
NBTI and PBTI increase the magnitude of the threshold-voltage of PMOS and NMOS transistors with use. Increase in threshold voltage results in reduced current, thereby causing performance degradation and reduced robustness/reliability. Several methods to characterize and sense the threshold voltage shifts exist. Circuit techniques such as power gating, dynamic voltage scaling, workload migration, and the like are used to target power and temperature challenges, and are expected to be beneficial for NBTI/PBTI as well.